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INTEGRATED CIRCUITS
DATA SHEET
TDA8708B Video analog input interface
Product specification Supersedes data of June 1994 File under Integrated Circuits, IC02 1996 Nov 26
Philips Semiconductors
Product specification
Video analog input interface
FEATURES * 8-bit resolution * Sampling rate up to 32 MHz * Binary or two's complement 3-state TTL outputs * TTL-compatible digital inputs and outputs * Internal reference voltage regulator * Power dissipation of 365 mW (typical) * Input selector circuit (one out of three video inputs) * Clamp and Automatic Gain Control (AGC) functions for CVBS and Y signals * No sample-and-hold circuit required * The TDA8708B has no white peak control in mode 2 whereas the TDA8708A has control in modes 1 and 2 * In-range output (not TTL levels). QUICK REFERENCE DATA SYMBOL VCCA VCCD VCCO ICCA ICCD ICCO ILE DLE fclk(max) B Ptot PARAMETER analog supply voltage digital supply voltage TTL output supply voltage analog supply current digital supply current TTL output supply current DC integral linearity error DC differential linearity error maximum clock frequency maximum -3 dB bandwidth (AGC amplifier) total power dissipation MIN. 4.5 4.5 4.2 - - - - - 30 12 - TYP. 5.0 5.0 5.0 37 24 12 - - 32 18 365 GENERAL DESCRIPTION APPLICATIONS * Video signal decoding
TDA8708B
* Scrambled TV (encoding and decoding) * Digital picture processing * Frame grabbing.
The TDA8708B is an analog input interface for video signal processing. It includes a video amplifier with clamp and gain control, an 8-bit Analog-to-Digital Converter (ADC) with a sampling rate of 32 MHz and an input selector.
MAX. 5.5 5.5 5.5 45 30 16 1 0.5 - - 500 V V V
UNIT
mA mA mA LSB LSB MHz MHz mW
ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TDA8708BT SO28 DESCRIPTION plastic small outline package; 28 leads; body width 7.5 mm VERSION SOT136-1
1996 Nov 26
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Philips Semiconductors
Product specification
Video analog input interface
BLOCK DIAGRAM
TDA8708B
handbook, full pagewidth
video input selection bit 0 14
video input selection bit 1 15
analog voltage output 19
ADC input 20
clock input 5
decoupling input 21
TTL outputs V CCO (+ 5 V) 7 9 output format/ chip enable (3-state input) D7 D6 D5 D4 D3 D2 D1 D0
VIDEO AMPLIFIER
video input 0 video input 1 video input 2 clamp capacitor connection AGC capacitor connection
16 17 18 24 25 INPUT SELECTOR AMP. 8 - bit ADC
1 2 3 TTL 4 OUTPUTS 10 11 12
TDA8708B
AGC & CLAMP LOGIC & MODE SELECTION in-range output 28
PEAK LEVEL DIGITAL COMPARATOR BLACK LEVEL DIGITAL COMPARATOR SYNC LEVEL DIGITAL COMPARATOR
13
27 sync level sync pulse
26 black level sync pulse
6 digital V CCD (+ 5 V)
8 digital ground
22 analog V CCA (+ 5 V)
23 analog ground
MSA672
Fig.1 Block diagram.
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Philips Semiconductors
Product specification
Video analog input interface
PINNING SYMBOL D7 D6 D5 D4 CLK VCCD VCCO DGND OF D3 D2 D1 D0 I0 I1 VIN0 VIN1 VIN2 ANOUT ADCIN DEC VCCA AGND CLAMP AGC GATE B GATE A IR PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 DESCRIPTION data output; bit 7 (MSB) data output; bit 6 data output; bit 5 data output; bit 4 clock input digital supply voltage (+5 V) TTL outputs supply voltage (+5 V) digital ground output format/chip enable (3-state input) data output; bit 3 data output; bit 2 data output; bit 1 data output; bit 0 (LSB) video input selection bit 0 video input selection bit 1 video input 0 video input 1 video input 2 analog voltage output analog-to-digital converter input decoupling input analog supply voltage (+5 V) analog ground clamp capacitor connection AGC capacitor connection black level synchronization pulse sync level synchronization pulse in-range output
MSA671
TDA8708B
D7 D6 D5 D4 CLK VCCD VCCO DGND OF
1 2 3 4 5 6 7 TDA8708B 8 9
28 IR 27 GATE A 26 GATE B 25 AGC 24 CLAMP 23 AGND 22 VCCA 21 DEC 20 ADCIN 19 ANOUT 18 VIN2 17 VIN1 16 VIN0 15 I1
D3 10 D2 11 D1 12 D0 13 I0 14
Fig.2 Pin configuration.
1996 Nov 26
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Philips Semiconductors
Product specification
Video analog input interface
FUNCTIONAL DESCRIPTION The TDA8708B provides a simple interface for decoding video signals. The TDA8708B operates in configuration mode 1 (see Fig.4) when the video signals are weak (i.e. when the gain of the AGC amplifier has not yet reached its optimum value). This enables a fast recovery of the synchronization pulses in the decoder circuit. When the pulses at the GATE A and GATE B inputs become distinct (GATE A and GATE B pulses are synchronization pulses occurring during the sync period and rear porch respectively) the TDA8708B automatically switches to configuration mode 2 (see Fig.5). When the TDA8708B is in configuration mode 1, the gain of the AGC amplifier will be roughly adjusted (sync level to a digital output level of 0 and the peak level to a digital output level of 255). In configuration mode 2 the digital output of the ADC is compared to internal digital reference levels. LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VCCA VCCD VCCO VCC analog supply voltage digital supply voltage TTL output supply voltage supply voltage differences: VCCA - VCCD VCCO - VCCD VCCA - VCCO VI IO Tstg Tamb Tj input voltage output current storage temperature operating ambient temperature junction temperature -1.0 -1.0 -1.0 -0.3 0 -55 0 0 +1.0 +1.0 +1.0 VCCA +10 +150 +70 +125 PARAMETER MIN. -0.3 -0.3 -0.3
TDA8708B
The voltage across the capacitor connected to the AGC pin controls the gain of the video amplifier. This is the gain control loop. The sync level comparator is active during a positive-going pulse at the GATE A input. This means that the sync pulse of the composite video signal is used as an amplitude reference. The bottom of the sync pulse is adjusted to obtain a digital output of logic 0 at the converter output. As the black level is at digital level 64, the sync pulse will have a digital amplitude of 64 LSBs. The use of nominal signals will prevent the output from exceeding a digital code of 213. The clamp level control is accomplished by using the same techniques as used for the gain control. The black-level digital comparator is active during a positive-going pulse at the GATE B input. The clamp capacitor will be charged or discharged to adjust the digital output to code 64.
MAX. +7.0 +7.0 +7.0 V V V V V V V
UNIT
mA C C C
THERMAL CHARACTERISTICS SYMBOL Rth j-a PARAMETER thermal resistance from junction to ambient in free air VALUE 70 UNIT K/W
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Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
CHARACTERISTICS VCCA = V22 to V23 = 4.5 to 5.5 V; VCCD = V6 to V8 = 4.5 to 5.5 V; VCCO = V7 to V8 = 4.2 to 5.5 V; AGND and DGND shorted together; VCCA to VCCD = -0.5 to +0.5 V; VCCO to VCCD = -0.5 to +0.5 V; VCCA to VCCO = -0.5 to +0.5 V; Tamb = 0 to +70 C; typical readings taken at VCCA = VCCD = VCCO = 5 V and Tamb = 25 C; unless otherwise specified. SYMBOL Supplies VCCA VCCD VCCO ICCA ICCD ICCO analog supply voltage digital supply voltage TTL output supply voltage analog supply current digital supply current TTL output supply current TTL load (see Fig.8) 4.5 4.5 4.2 - - - 5.0 5.0 5.0 37 24 12 5.5 5.5 5.5 45 30 16 V V V mA mA mA PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Video amplifier inputs VIN0 TO VIN2 INPUTS VI(p-p) Zi Ci VIL VIH IIL IIH VIL VIH IIL IIH tW V25(min) V25(max) input voltage (peak-to-peak value) input impedance input capacitance AGC load with external capacitor; note 1 fi = 6 MHz fi = 6 MHz 0.6 10 - 0 2.0 VI = 0.4 V VI = 2.7 V -400 - 0 2.0 VI = 0.4 V VI = 2.7 V see Fig.5 -400 - 2 - - - 20 1 - - - - - - - - - 2.8 4.0 see Table 2 - - 1.5 - - 0.8 VCCD - 20 V k pF
I0 AND I1 TTL INPUTS (see Table 1) LOW level input voltage HIGH level input voltage LOW level input current HIGH level input current V V A A V V A A s V V
GATE A AND GATE B TTL INPUTS (see Figs 4 and 5) LOW level input voltage HIGH level input voltage LOW level input current HIGH level input current pulse width 0.8 VCCD - 20 - - -
AGC INPUT (PIN 25) AGC voltage for minimum gain AGC voltage for maximum gain AGC output current CLAMP INPUT (PIN 24) V24 I24 clamp voltage for code 128 output clamp output current 3.5 see Table 3 V
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Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Video amplifier outputs ANOUT OUTPUT (PIN 19) V19(p-p) I19 IO(p-p) V19 Z19 ct Gdiff diff B S/N SVRR1 G Gstab AC output voltage (peak-to-peak value) internal current source output current driven by the load DC output voltage for black level output impedance VVIN = 1.33 V (p-p); V25 = 3.6 V RL = VANOUT = 1.33 V (p-p); note 2 note 3 - 2.0 - - - - - - 12 note 4 note 5 see Fig.10 see Fig.10 60 - -4.5 - 1.33 2.5 - - - 1.0 V mA mA V
VCCA - 2.24 - 20 -50 2 0.8 - - 45 - - - -45 - - - - - +6.0 5
Video amplifier dynamic characteristics crosstalk between VIN inputs differential gain differential phase -3 dB bandwidth signal-to-noise ratio supply voltage ripple rejection gain range gain stability as a function of supply voltage and temperature VCCA = 4.75 to 5.25 V VVIN = 1.33 V (p-p); V25 = 3.6 V VVIN = 1.33 V (p-p); V25 = 3.6 V dB % deg MHz dB dB dB %
Analog-to-digital converter inputs CLK INPUT (PIN 5) VIL VIH IIL IIH |Zi| CI VIL VIH V9 IIL IIH LOW level input voltage HIGH level input voltage LOW level input current HIGH level input current input impedance input capacitance Vclk = 0.4 V Vclk = 2.7 V fclk = 10 MHz fclk = 10 MHz 0 2.0 -400 - - - 0 2.6 - -370 - - - - - 4 4.5 - - 1.15 -300 300 0.8 VCCD - 100 - - 0.2 VCCD - - 450 V V A A k pF
OF INPUT (3-STATE; see Table 4) LOW level input voltage HIGH level input voltage input voltage in high impedance state LOW level input current HIGH level input current V V V A A
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Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
SYMBOL
PARAMETER
CONDITIONS - - - - fi = 6 MHz fi = 6 MHz - -
MIN.
TYP.
MAX.
UNIT
ADCIN INPUT (PIN 20; see Table 5) V20 V20 V20(p-p) I20 Zi Ci input voltage input voltage input voltage amplitude (peak-to-peak value) input current input impedance input capacitance digital output = 00 digital output = 255 VCCA - 2.42 - VCCA - 1.41 - 1.0 1.0 50 1 - 10 - - V V V A M pF
Analog-to-digital converter outputs IR OUTPUT (PIN 28) VOL VOH IO VOL VOH IOZ fclk(max) LOW level output voltage HIGH level output voltage output current - 1.9 -500 IOL = 2 mA IOL = -0.4 mA 0.4 V < VO < VCCD see Fig.6; note 6 0 2.4 -20 - - - - - - 1.7 - - 0.6 VCCD +20 - - - 0 - 5 1 0.5 2 V V A V V A
DIGITAL OUTPUTS D0 TO D7 LOW level output voltage HIGH level output voltage output current in 3-state mode
Switching characteristics maximum clock input frequency 30 - - - - - - - note 9 - 32 MHz
Analog signal processing (fclk = 32 MHz); see Fig.8 Gdiff diff f1 fall SVRR2 differential gain differential phase fundamental harmonics (full-scale) harmonics (full-scale); all components supply voltage ripple rejection V20 = 1.0 V (p-p); see Fig.7; note 7 see Fig.7; note 7 fi = 4.43 MHz; note 7 fi = 4.43 MHz; note 7 note 8 2 2 - -55 1 - - - % deg dB dB %/V
Transfer function (see Fig.8) ILE DLE ILE DC integral linearity error DC differential linearity error AC integral linearity error LSB LSB LSB
Timing (fclk = 32 MHz) see Figs 6, 7 and 8 DIGITAL OUTPUTS (CL = 15 pF; IOL = 2 mA; RL = 2 k) tds th td tdEZ tdDZ sampling delay time output hold time output delay time 3-state delay time; output enable 3-state delay time; output disable - 6 - - - 2 8 16 19 14 - - 20 25 20 ns ns ns ns ns
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Philips Semiconductors
Product specification
Video analog input interface
Notes 1. 0 dB is obtained at the AGC amplifier when applying Vi(p-p) = 1.33 V.
TDA8708B
2. The output current at pin 19 should not exceed 1 mA. The load impedance RL should be referenced to VCCA and defined as: a) AC impedance 1 k and the DC impedance >2.7 k. b) The load impedance should be coupled directly to the output of the amplifier so that the DC voltage supplied by the clamp is not disturbed. 3. Control mode 2 is selected. V ANOUTC ( p - p ) S 4. Signal-to-noise ratio measured with 5 MHz bandwidth: --- = 20 log ------------------------------------------------ at B = 5 MHz . V ANOUTY (RMS noise) N 5. The voltage ratio is expressed as: V CCA G SVRR1 = 20 log ----------------- x -------- for VI = 1 V (p-p), gain at 100 kHz = 1 and 1 V supply variation. V CCA G 6. It is recommended that the rise and fall times of the clock are 2 ns. In addition, a `good layout' for the digital and analog grounds is recommended. 7. These measurements are realized on analog signals after a digital-to-analog conversion (TDA8702 is used). 8. The supply voltage rejection is the relative variation of the analog signal (full-scale signal at input) for 1 V of supply variation: ( V I ( 00 ) - V I ( FF ) ) + ( V I ( 00 ) - V I ( FF ) ) SVRR2 = ----------------------------------------------------------------------------------------------------V CCA 9. Full-scale sine wave (fi = 4.4 MHz; fclk = 27 MHz).
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Philips Semiconductors
Product specification
Video analog input interface
Table 1 Video input selection (CVBS) I1 0 0 1 1 I0 0 1 0 1 SELECTED INPUT VIN0 VIN1 VIN2 VIN2 X(1) 0 Table 2 AGC output current GATE A GATE B 1 0 1 1 X(2) 0 DIGITAL OUTPUT IAGC MODE(1) 1 1 2 2 2 open Note 1. Use C 10 pF to DGND. Table 4 OF input coding OF 0 1 circuit(1) Note 1. X = don't care. 0 1 1 1 Table 3 CLAMP output current GATE A GATE B DIGITAL OUTPUT output < 0 output > 0 X output < 64 64 < output
TDA8708B
ICLAMP 130 A -2.5 A 0 A +50 A -50 A
MODE 1 1 2 2 2
output < 255 -2.5 A output > 255 130 A - output < 0 output > 0 0 A +2.5 A -2.5 A
D0 TO D7 active, two's complement high impedance active, binary
Notes 1. Mode 2 can only be initialized with successive pulses on GATE A and GATE B (see Fig.5). 2. X = don't care. Table 5 Output coding and input voltage (typical values) BINARY OUTPUTS STEP Underflow 0 1 . . 254 255 Overflow VADCIN - VCCA - 2.41 V - - - - VCCA - 1.41 V - D7 0 0 0 . . 1 1 1 D6 0 0 0 . . 1 1 1 D5 0 0 0 . . 1 1 1 D4 0 0 0 . . 1 1 1 D3 0 0 0 . . 1 1 1 D2 0 0 0 . . 1 1 1
TWO'S COMPLEMENT D1 0 0 0 . . 1 1 1 D0 0 0 1 . . 0 1 1 D7 1 1 1 . . 0 0 0 D6 0 0 0 . . 1 1 1 D5 0 0 0 . . 1 1 1 D4 0 0 0 . . 1 1 1 D3 0 0 0 . . 1 1 1 D2 0 0 0 . . 1 1 1 D1 0 0 0 . . 1 1 1 D0 0 0 1 . . 0 1 1
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Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
handbook, full pagewidth
0.25 V
5 MHz sine wave
1.0 V
0.25 V
64 s
MBB959
Fig.3 Test signal on the ADCIN pin for differential gain and phase measurements.
k, full pagewidth digital
output level peak-level gain control 255
MBB969
black-level clamping
sync-level gain control 0 GATE A time
GATE B
MODE 1
Fig.4 Control mode 1.
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Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
handbook, full pagewidth digital
MSA674
output level
255
black-level clamping 64 sync-level control 0 GATE A tW tW time
GATE B
MODE 2
Fig.5 Control mode 2.
handbook, full pagewidth
CLK input t ds sample N2 analog input (ADCIN) sample N1 sample N
clock input reference level (1.5 V)
sample N1
th 2.4 V data outputs data N 3 D0 to D7) data N 2 data N 1 data N data N 1 0.4 V td
MBB958
Fig.6 Timing diagram for data output.
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Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
handbook, full pagewidth
OF input
open
data outputs (D0 to D7)
high impedance two's complement binary
2.4 V
0.4 V t dDZ t dEZ
MBB968
Fig.7 Output format timing diagram.
V CCO
handbook, halfpage
2 k D0 to D7 15 pF IN916 or IN3064
MBD865
DGND
Fig.8 Load circuit for timing measurement; data outputs (OF = LOW or open-circuit).
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Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
V CCO
handbook, halfpage
2 k
S1 D0 to D7 C 5 k IN916 or IN3064
S2
MBB955
DGND
Fig.9 Load circuit for timing measurement; 3-state outputs (OF: fi = 1 MHz; VOF = 3 V).
12 G (dB) 8 5% 4
MSA676
0
(1) (2)
4
8 2.6
3
3.4
3.8
4.2
4.6 V 25 (V)
(1) Typical value (VCCA = VCCD = 5 V; Tamb = 25 C). (2) Minimum and maximum values (temperature and supply).
Fig.10 Gain control curve.
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handbook, full pagewidth
1996 Nov 26
VCCO pins 1 to 4 and 10 to 13 data outputs DGND VCCD DGND pin 5 clock input 1.5 V DGND 4 V BE VCCD chip enable pin 9 OF VREF DGND VCCA 20 k binary/ two's complement
INTERNAL PIN CIRCUITRY
Philips Semiconductors
Video analog input interface
pin 28 IR
pins 26 or 27 GATE A or GATE B VCCD VCCD
pin 25 AGC VCCD VCCA
pin 6 VCCD DGND AGND DGND VCCA pin 7 VCCO pin 22 VCCA pin 24 CLAMP
TDA8708B
I1
I1
I2
pin 8 DGND pin 23 AGND
15
pins 14 or 15 I 0 ,I 1 AGND
AGND VCCA VCCA VCCA VCCA
V top Vmid
2.5 mA AGND pins 16 to 18 VIN0, VIN1 and VIN2 AGND pin 20 ADCIN AGND pin 21 DEC
Vbottom AGND
VREF
pin 19 ANOUT
MSA675
Product specification
TDA8708B
Fig.11 Internal pin configuration.
Philips Semiconductors
Product specification
Video analog input interface
APPLICATION INFORMATION Additional information can be found in the laboratory report of TDA8708A "FBL/AN9308".
TDA8708B
handbook, full pagewidth
1
28
(2)
2 data outputs 3
27
horizontal sync
26
horizontal clamp 220 nF
4 100 clock 33 pF 5
25 18 nF 24
6 22 nF
(1)
23 1 F 10 nF 1H 5V 1 F 5V
5V
22
7 22 nF 8 TDA8708B
22
21
9 10 pF 10
20 LOW PASS FILTER 19 4.7 F
(3)
11 data outputs 12
18 4.7 F 17 4.7 F 75 75 75
13
16
14
15
MSA673
(1) It is recommended to decouple VCCO through a 22 resistor especially when the output data of TDA8708B interfaces with a capacitive CMOS load device. (2) When IR is not used, it must be connected to ground via a 47 pF capacitor. (3) See Figs 13 and 15 for examples of the low-pass filters.
Fig.12 Application diagram.
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Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
22 H
dbook, full pagewidth
22 H
ANOUT (pin 19) Vi
680
12 pF
12 pF 2.2 k
ADCIN (pin 20) 27 pF
MBB966 - 1
27 pF
68 pF
Vo
VCCA (pin 22)
This filter can be adapted to various applications with respect to performance requirements. An input and output impedance of at least 680 and 2.2 k must in any event be applied.
Fig.13 Example of a low-pass filter for CVBS and Y signals.
Characteristics of Fig.14: * Order 5; adapted CHEBYSHEV
handbook, halfpage
0
MSA682
* Ripple 0.4 dB * f = 6.5 MHz at -3 dB * fnotch = 9.75 MHz.
(dB)
40
80
120
160
0
10
20
f (MHz)
30
Fig.14 Frequency response for filter shown in Fig.13.
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Philips Semiconductors
Product specification
Video analog input interface
TDA8708B
handbook, full pagewidth
ADOUT (pin 19) Vi
680
82 H 2.2 k 15 pF 15 pF
MSA678
ADCIN (pin 20) Vo
VCCA (pin 22)
This filter can be adapted to various applications with respect to performance requirements. An input and output impedance of at least 680 and 2.2 k must in any event be applied.
Fig.15 Example of an economical low-pass filter for CVBS and Y signals.
Characteristics of Fig.16: * Order 5; adapted CHEBYSHEV
handbook, halfpage
MSA681
0
* Ripple 0.4 dB * f = 6.5 MHz at -3 dB.
(dB)
10
20
30
40
0
10
20
f (MHz)
30
Fig.16 Frequency response for filter shown in Fig.15.
1996 Nov 26
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Philips Semiconductors
Product specification
Video analog input interface
PACKAGE OUTLINE SO28: plastic small outline package; 28 leads; body width 7.5 mm
TDA8708B
SOT136-1
D
E
A X
c y HE vMA
Z 28 15
Q A2 A1 pin 1 index Lp L 1 e bp 14 wM detail X (A 3) A
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 2.65 0.10 A1 0.30 0.10 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 c 0.32 0.23 D (1) 18.1 17.7 0.71 0.69 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.050 HE 10.65 10.00 L 1.4 Lp 1.1 0.4 Q 1.1 1.0 0.043 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z
(1)
0.9 0.4 0.035 0.016
0.012 0.096 0.004 0.089
0.019 0.013 0.014 0.009
0.419 0.043 0.055 0.394 0.016
8o 0o
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT136-1 REFERENCES IEC 075E06 JEDEC MS-013AE EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-01-24 97-05-22
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Philips Semiconductors
Product specification
Video analog input interface
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). Reflow soldering Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. Wave soldering
TDA8708B
Wave soldering techniques can be used for all SO packages if the following conditions are observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow. * The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
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Philips Semiconductors
Product specification
Video analog input interface
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TDA8708B
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
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Philips Semiconductors
Product specification
Video analog input interface
NOTES
TDA8708B
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Philips Semiconductors
Product specification
Video analog input interface
NOTES
TDA8708B
1996 Nov 26
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Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 689 211, Fax. +359 2 689 102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, Tel. +45 32 88 2636, Fax. +45 31 57 1949 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615800, Fax. +358 9 61580/xxx France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex, Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 23 53 60, Fax. +49 40 23 536 300 Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS, Tel. +30 1 4894 339/239, Fax. +30 1 4814 240 Hungary: see Austria India: Philips INDIA Ltd, Shivsagar Estate, A Block, Dr. Annie Besant Rd. Worli, MUMBAI 400 018, Tel. +91 22 4938 541, Fax. +91 22 4938 722 Indonesia: see Singapore Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 247 9145, Fax. +7 095 247 9144 Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. +27 11 470 5911, Fax. +27 11 470 5494 South America: Rua do Rocio 220, 5th floor, Suite 51, 04552-903 Sao Paulo, SAO PAULO - SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 829 1849 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 3 301 6312, Fax. +34 3 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 632 2000, Fax. +46 8 632 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2686, Fax. +41 1 481 7730 Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66, Chung Hsiao West Road, Sec. 1, P.O. Box 22978, TAIPEI 100, Tel. +886 2 382 4443, Fax. +886 2 382 4444 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Talatpasa Cad. No. 5, 80640 GULTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1996
Internet: http://www.semiconductors.philips.com
SCA52
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
537021/1200/04/pp24
Date of release: 1996 Nov 26
Document order number:
9397 750 01456

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